File:Aufbau CMOS-Chip 2000er.svg

Summary

Description
Deutsch: Beispielhafter schematischer Aufbau eines CMOS-Chips, wie er Anfang der 2000er verwendet wird. Dargestellt werden LDD-MISFETs auf einem SOI-Siliciumsubstrat, fünf Metallisierungsebenen und ein Lotkontakt für die Flip-Chip-Kontaktierung. Außerdem sind die Arbeitsabschnitte FEOL (front-end of line), BEOL (back-end of line) sowie das Teile vom back-end bzw. packaging gekennzeichnet.
Date
Source Diverse Uni-Skripte & Fachzeitschriftenartikel
Author Cepheiden at German Wikipedia
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Category:CC-BY-SA-3.0-migrated#Aufbau%20CMOS-Chip%202000er.svgCategory:License migration completed#Aufbau%20CMOS-Chip%202000er.svgCategory:GFDL#Aufbau%20CMOS-Chip%202000er.svg
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Original upload log

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  • 2006-12-06 15:09 Cepheiden 550×810× (86527 bytes) {{Information |Beschreibung=Beispielhafter schematischer Aufbau eines [[CMOS]]-Chips, wie er Anfang der 2000er verwendet wird. Dagestellt werden LDD-[[Feldeffekttransistor|MISFET]]s auf einem [[SOI]]-Siliciumsubstrat, fünf Metallisierungsebenen und ein L
Category:CMOS Category:Semiconductors Category:Integrated circuit production Category:SVG microtechnology
Category:CC-BY-SA-3.0-migrated Category:CMOS Category:GFDL Category:Integrated circuit production Category:License migration completed Category:SVG microtechnology Category:Self-published work Category:Semiconductors Category:User-created GFDL images